In many industrial applications it is necessary to translate a digital signal at TTL or CMOS level from the original ground reference to another reference that is normally floating between much higher voltage limits (0-600V or 0-1200V) with respect to the reference where the signal is generated. In other cases, a signal generated in the floating stages of the system needs to be translated to the stable ground of the remaining of the circuitry in order to be processed.
FIG. 1 and FIG. 2 show the solution implemented in a prior art integrated architecture. It is clearly evident that the signal transmission can be done only when the ground shift potential is positive, that is the floating ground voltage is above the logic ground and the VDS on the level shifter MOSFET is high enough to keep the device out of saturation. If the floating ground voltage approaches the logic ground voltage and the MOSFET enters the saturation region, no signal can be transmitted. When the floating ground goes below the logic ground, that is, the ground shift potential is negative, the transmission is not possible at all and even worse, if the positive side of the high side floating supply is below the logic ground level, then other serious problems, such as latch up and consequent fatal destruction may occur in the IC structure depending on its substrate ground connection.
Summing up, the structures shown in FIG. 1 and FIG. 2 normally transmit correct information only when the positive side of the high side floating supply is at a voltage level at least 4V higher than the logic ground while, on the other hand, the maximum level shift potential is limited to the BVDSS voltage of the high voltage MOSFET normally at 600V or 1200V.
The MOSFETs in the figures are the only components able to withstand 1200V. The high side referenced circuits are normally low voltage analog or logic circuits surrounded by a high voltage isolation structure created through the insertion of P+ and Poly silicon rings.